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	<title>Sawcb.org Computer Bank &#187; Cpu</title>
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	<link>http://www.sawcb.org</link>
	<description>SAWCB - Southern Arizona Women's Computer Bank</description>
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		<title>Intel Core i7 Processor Series &#8211; Features &amp; Specifications</title>
		<link>http://www.sawcb.org/intel-core-i7-processor-series-features-specifications.html</link>
		<comments>http://www.sawcb.org/intel-core-i7-processor-series-features-specifications.html#comments</comments>
		<pubDate>Mon, 08 Dec 2008 22:38:24 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Cpu]]></category>

		<guid isPermaLink="false">http://www.sawcb.org/?p=135</guid>
		<description><![CDATA[




Processor Name


Cores


Clock


Cache


QPI/FSB


TDP



Intel Core i7 Extreme 965

4


3.20GHz


8MB


3200MHz


150W



Intel Core i7 940

4


2.93GHz


8MB


2400MHz


130W



Intel Core i7 920

4


2.66GHz


8MB


2400MHz


130W



Intel Core 2 Extreme QX9775

4


3.20GHz


2 x 6MB


1600MHz


150W



Intel Core 2 Extreme QX9770

4


3.20GHz


2 x 6MB


1600MHz


136W



Intel Core 2 Extreme Q9650

4


3.00GHz


2 x 6MB


1333MHz


130W



Intel Core 2 Quad Q9550

4


2.83GHz


2 x 6MB


1333MHz


95W



Intel Core 2 Quad Q9450

4


2.66GHz


2 x 6MB


1333MHz


95W



Intel Core 2 Quad Q9400

4


2.66GHz


2 x 3MB


1333MHz


95W



Intel Core 2 Quad Q9300

4


2.50GHz


2 x 3MB


1333MHz


95W



Intel Core [...]]]></description>
			<content:encoded><![CDATA[<p><img src="http://i137.photobucket.com/albums/q209/divxarsiv/sawcb/86px-IntelCorei7Extreme.png" alt="intel core i7" /><span id="more-135"></span></p>
<table style="border-collapse: collapse;" border="1" cellspacing="0" cellpadding="2" width="500" align="center" bordercolor="#000000">
<tbody>
<tr>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">Processor Name</div>
</td>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">Cores</div>
</td>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">Clock</div>
</td>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">Cache</div>
</td>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">QPI/FSB</div>
</td>
<td align="left" bgcolor="#ffce5b">
<div class="tableheader">TDP</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core i7 Extreme 965</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">3.20GHz</div>
</td>
<td align="left">
<div class="tablefont">8MB</div>
</td>
<td align="left">
<div class="tablefont">3200MHz</div>
</td>
<td align="left">
<div class="tablefont">150W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core i7 940</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.93GHz</div>
</td>
<td align="left">
<div class="tablefont">8MB</div>
</td>
<td align="left">
<div class="tablefont">2400MHz</div>
</td>
<td align="left">
<div class="tablefont">130W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core i7 920</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.66GHz</div>
</td>
<td align="left">
<div class="tablefont">8MB</div>
</td>
<td align="left">
<div class="tablefont">2400MHz</div>
</td>
<td align="left">
<div class="tablefont">130W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Extreme QX9775</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">3.20GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 6MB</div>
</td>
<td align="left">
<div class="tablefont">1600MHz</div>
</td>
<td align="left">
<div class="tablefont">150W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Extreme QX9770</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">3.20GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 6MB</div>
</td>
<td align="left">
<div class="tablefont">1600MHz</div>
</td>
<td align="left">
<div class="tablefont">136W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Extreme Q9650</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">3.00GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 6MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">130W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Quad Q9550</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.83GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 6MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">95W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Quad Q9450</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.66GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 6MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">95W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Quad Q9400</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.66GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 3MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">95W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Quad Q9300</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.50GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 3MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">95W</div>
</td>
</tr>
<tr>
<td align="left"><span class="tablefont">Intel Core 2 Quad Q8200</span></td>
<td align="left">
<div class="tablefont">4</div>
</td>
<td align="left">
<div class="tablefont">2.33GHz</div>
</td>
<td align="left">
<div class="tablefont">2 x 2MB</div>
</td>
<td align="left">
<div class="tablefont">1333MHz</div>
</td>
<td align="left">
<div class="tablefont">95W</div>
</td>
</tr>
</tbody>
</table>
<table border="1" cellspacing="2" cellpadding="5" width="700" align="center" bgcolor="#000000">
<tbody>
<tr>
<td style="font-size: larger;" colspan="4" align="middle" bgcolor="#b8c99f"><strong>Features &amp; Specifications </strong></td>
</tr>
<tr>
<td bgcolor="#b8c99f"></td>
<td align="middle" bgcolor="#b8c99f"><strong>Intel Core i7-965<br />
Extreme Edition</strong></td>
<td align="middle" bgcolor="#b8c99f"><strong>Intel Core i7-940</strong></td>
<td align="middle" bgcolor="#b8c99f"><strong>Intel Core i7-920</strong></td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Clock Speed (GHz) </strong></td>
<td align="middle" bgcolor="#ffffff">3.20</td>
<td align="middle" bgcolor="#ffffff">2.93</td>
<td align="middle" bgcolor="#ffffff">2.66</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>QPI Speed (GT/sec) </strong></td>
<td align="middle" bgcolor="#ffffff">6.4</td>
<td align="middle" bgcolor="#ffffff">4.8</td>
<td align="middle" bgcolor="#ffffff">4.8</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Socket</strong></td>
<td colspan="3" align="middle" bgcolor="#ffffff">1366-pin LGA</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Cache</strong></td>
<td colspan="3" align="middle" bgcolor="#ffffff">8 Megabytes</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Memory Speed Support</strong></td>
<td colspan="3" align="middle" bgcolor="#ffffff">DDR3-1066</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>TDP</strong></td>
<td colspan="3" align="middle" bgcolor="#ffffff">130 Watts</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Overspeed Protection Removed </strong></td>
<td align="middle" bgcolor="#ffffff">Yes</td>
<td align="middle" bgcolor="#ffffff">No</td>
<td align="middle" bgcolor="#ffffff">No</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Processor Architecture</strong></td>
<td colspan="3" align="middle" bgcolor="#ffffff">New Intel Core micro architecture (Nehalem) 45nm</td>
</tr>
<tr>
<td bgcolor="#b8c99f"><strong>Key Platform Features</strong></td>
<td colspan="3" align="left" bgcolor="#ffffff">
<ul>
<li>Intel Hyper-Threading Technology delivers 8-threaded performance on 4 cores</li>
<li>Intel Turbo Boost Technology</li>
<li>8M Intel Smart Cache</li>
<li>Integrated Memory Controller with support for 3 channels of DDR3 1066 memory</li>
<li>Intel QuickPath interconnect to Intel X58 Express Chipset</li>
</ul>
</td>
</tr>
</tbody>
</table>
]]></content:encoded>
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		</item>
		<item>
		<title>AMD&#8217;s Barcelona to hit server racks in April</title>
		<link>http://www.sawcb.org/amds-barcelona-to-hit-server-racks-in-april.html</link>
		<comments>http://www.sawcb.org/amds-barcelona-to-hit-server-racks-in-april.html#comments</comments>
		<pubDate>Thu, 20 Mar 2008 23:16:03 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Cpu]]></category>
		<category><![CDATA[amd processor]]></category>
		<category><![CDATA[AMD's Barcelona to hit server racks in April]]></category>
		<category><![CDATA[angekündigt]]></category>
		<category><![CDATA[architecture]]></category>
		<category><![CDATA[Architektur]]></category>
		<category><![CDATA[b2]]></category>
		<category><![CDATA[b3]]></category>
		<category><![CDATA[Barcelona]]></category>
		<category><![CDATA[barcelona architecture]]></category>
		<category><![CDATA[commercial business]]></category>
		<category><![CDATA[Computerworld]]></category>
		<category><![CDATA[design]]></category>
		<category><![CDATA[erratum]]></category>
		<category><![CDATA[gigantic market]]></category>
		<category><![CDATA[IBM]]></category>
		<category><![CDATA[k10]]></category>
		<category><![CDATA[Kevin Knox]]></category>
		<category><![CDATA[Launch]]></category>
		<category><![CDATA[marketability]]></category>
		<category><![CDATA[maximum]]></category>
		<category><![CDATA[maximum density]]></category>
		<category><![CDATA[Monaten]]></category>
		<category><![CDATA[opteron processors]]></category>
		<category><![CDATA[Opterons]]></category>
		<category><![CDATA[processor]]></category>
		<category><![CDATA[processor configurations]]></category>
		<category><![CDATA[processor cores]]></category>
		<category><![CDATA[processor design]]></category>
		<category><![CDATA[proliant]]></category>
		<category><![CDATA[server level]]></category>
		<category><![CDATA[setbacks]]></category>
		<category><![CDATA[und]]></category>
		<category><![CDATA[VP von]]></category>

		<guid isPermaLink="false">http://www.sawcb.org/amds-barcelona-to-hit-server-racks-in-april.html</guid>
		<description><![CDATA[

&#160;
After months of setbacks and delays, AMD&#8217;s K10 Barcelona architecture is finally ready for server-level deployment. The new Opteron processors will be based on the B3 silicon revision, and will correct the TLB erratum that effectively wrecked Barcelona&#8217;s earlier September launch. The Sunnyvale-based manufacturer has announced that it expects servers based on its B3 silicon [...]]]></description>
			<content:encoded><![CDATA[<p style="text-align: center"><img src="http://i137.photobucket.com/albums/q209/divxarsiv/sawcb/Opty.png" /></p>
<p><span id="more-115"></span></p>
<p style="text-align: center">&nbsp;</p>
<p style="text-align: center">After months of setbacks and delays, AMD&#8217;s K10 Barcelona architecture is finally ready for server-level deployment. The new Opteron processors will be based on the B3 silicon revision, and will correct the TLB erratum that effectively wrecked Barcelona&#8217;s earlier September launch. The Sunnyvale-based manufacturer has announced that it expects servers based on its B3 silicon revision to ship in April. HP, Dell, and IBM are all expected to launch servers over the next few months, but HP in particular has something big in the pipeline.<br />
Related Stories</p>
<p>On Monday, HP announced the ProLiant DL785, its largest x86 server to date. The DL785 will be available in both four-processor and eight-processor configurations, and will use AMD&#8217;s new B3 quad-core Opterons for a maximum of 32 processor cores in a single server. Those 32 cores won&#8217;t lack for memory; the DL785 will launch with support for up to 256GB of RAM, with a 512GB maximum density once 8GB DIMMs become available this fall.</p>
<p>Design wins like this are particularly important for AMD as the company effectively relaunches a product line that should have been available six months ago. Substantially higher clockspeeds than the 2GHz AMD debuted at Barcelona&#8217;s September launch could improve B3&#8217;s overall marketability, but neither HP nor AMD has given any guidance on what frequencies to expect.</p>
<p>AMD&#8217;s VP of commercial business, Kevin Knox, was, however, willing to discuss the aftermath of the TLB erratum with Computerworld, as well as share his thoughts on Intel&#8217;s upcoming six-core Dunnington processor (currently due in the second half of this year). According to Knox, the work the company did in repairing the B2 TLB erratum will aid AMD in future processor design.</p>
<p>Knox isn&#8217;t so sure, however, that Dunnington will be a compelling product. &#8220;Six cores is interesting. Again, I&#8217;m not convinced there&#8217;s a gigantic market of applications that want to exploit that number,&#8221; Knox told Computerworld. &#8220;We still believe we&#8217;re going to be extremely competitive. When you look at the architecture things we&#8217;ve done, like hyper transport, that will make us extremely competitive, added to the fact that we&#8217;ll have quad-core to compete against quad-core.&#8221;<br />
While it&#8217;s true that the number of applications optimized for n number of cores drops as n increases, businesses and institutions with workloads that do benefit from processors with more than four cores will probably tend to prefer Dunnington (or Dunnington-compatible) hardware. The theoretical results of a Dunnington match-up, however, are the least of AMD&#8217;s concerns. Intel&#8217;s 45nm Harpertown Xeons have already ridden into town, and they&#8217;re the competition AMD&#8217;s revised Barcelona core will have to face as best it can.<br />
__________________________________________________<br />
___________________________________________<br />
Nach Monaten der Rückschläge und Verzögerungen, AMD K10-Barcelona-Architektur ist endlich bereit für die Server-Ebene Einsatz. Die neuen Opteron-Prozessoren wird auf die B3 Silizium-Revision, und korrigiert die TLB Erratum, dass tatsächlich zerstört Barcelona&#8217;s früher September starten. Sunnyvale-Der Hersteller hat angekündigt, dass er erwartet, basierend auf seinen Servern B3 Silizium Revision to ship in April. HP, Dell und IBM sind alle Server zu starten erwartet in den nächsten Monaten, aber HP hat vor allem etwas Großes in der Pipeline.<br />
Related Stories</p>
<p>Am Montag, angekündigt, den HP ProLiant DL785, ihren größten x86-Server zu aktualisieren. Die DL785 wird in den beiden Vier-und Acht-Prozessor-Prozessor-Konfigurationen, und wird der neue B3 AMD Quad-Core Opterons für einen Zeitraum von höchstens 32 Prozessorkerne in einem einzigen Server. Diese 32 Kerne werden nicht für die mangelnde Speicher, der DL785 wird mit Unterstützung für bis zu 256GB RAM, 512GB mit einer maximalen Dichte einmal 8 GB DIMMs verfügbar sind in diesem Herbst.</p>
<p>Design gewinnt davon sind besonders wichtig für AMD, da das Unternehmen effektiv Relaunches eine Produktlinie, die bereits seit sechs Monaten. Clockspeeds wesentlich höher als die 2GHz AMD gab sein Debüt in Barcelona im September starten könnte B3 Verbesserung der Marktfähigkeit insgesamt, aber weder HP noch AMD hat keine Anleitung, was Frequenzen zu erwarten.</p>
<p>AMD&#8217;s VP von kommerziellen Unternehmen, Kevin Knox, war aber bereit, um über die Folgen der TLB Erratum mit Computerworld, ebenso wie seine Gedanken über die kommenden sechs Intel-Core-Prozessor Dunnington (derzeit wegen in der zweiten Hälfte dieses Jahres) . Nach Knox, die Arbeit in der Gesellschaft hat die Reparatur der B2 TLB Erratum werden Beihilfen in Zukunft AMD-Prozessor-Design.</p>
<p>Knox ist nicht so sicher, dass Dunnington wird ein überzeugendes Produkt. &#8220;Six-Cores ist interessant. Nochmals, ich bin nicht davon überzeugt, gibt es einen riesigen Markt für Anwendungen nutzen wollen, dass diese Zahl&#8221;, sagte Knox Computerworld. &#8220;Wir glauben immer noch, wir werden sehr konkurrenzfähig. Wenn man sich die Architektur Dinge, die wir getan haben, wie Hyper Transport, dann machen uns extrem wettbewerbsfähig, ergänzte der Tatsache, dass wir Quad-Core-Wettbewerb Gegen Quad-Core. &#8221;<br />
Während es stimmt, dass die Zahl der Anwendungen optimiert für n Aderzahl n steigt als sinkt, Unternehmen und Institutionen mit Arbeitslasten, die profitieren von Prozessoren mit mehr als vier Kerne werden wahrscheinlich eher zu bevorzugen Dunnington (oder Dunnington-kompatibel) Hardware. Die theoretischen Ergebnisse einer Dunnington Match-up, jedoch sind die am wenigsten von AMD&#8217;s betrifft. Intel&#8217;s 45nm Harpertown Xeons haben sich bereits in die Stadt geritten, und sie sind der Konkurrenz AMD&#8217;s revised Barcelona core wird zu kämpfen haben, wie sie am besten können.</p>
]]></content:encoded>
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		</item>
		<item>
		<title>Intel renames Silverthorn and Diamondville chips</title>
		<link>http://www.sawcb.org/intel-renames-silverthorn-and-diamondville-chips.html</link>
		<comments>http://www.sawcb.org/intel-renames-silverthorn-and-diamondville-chips.html#comments</comments>
		<pubDate>Thu, 06 Mar 2008 15:42:43 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Cpu]]></category>
		<category><![CDATA[absolut]]></category>
		<category><![CDATA[and]]></category>
		<category><![CDATA[aufregendste]]></category>
		<category><![CDATA[Bild]]></category>
		<category><![CDATA[Centrino]]></category>
		<category><![CDATA[development]]></category>
		<category><![CDATA[Diamondville]]></category>
		<category><![CDATA[Diamondville chips]]></category>
		<category><![CDATA[Entwicklung]]></category>
		<category><![CDATA[hardware]]></category>
		<category><![CDATA[image processors]]></category>
		<category><![CDATA[Intel renames]]></category>
		<category><![CDATA[Intel renames Silverthorn and Diamondville chips]]></category>
		<category><![CDATA[marketing]]></category>
		<category><![CDATA[Menlow]]></category>
		<category><![CDATA[namen]]></category>
		<category><![CDATA[Prozessoren]]></category>
		<category><![CDATA[Silverthorn]]></category>
		<category><![CDATA[Technology]]></category>
		<category><![CDATA[umbenannt]]></category>

		<guid isPermaLink="false">http://www.sawcb.org/intel-renames-silverthorn-and-diamondville-chips.html</guid>
		<description><![CDATA[

&#160;
As the title and included image suggest, the Silverthorn and Diamondville processors have officially been renamed to Atom, with the Menlow platform now titled as Centrino Atom. Sure enough the new names sport absolutely no hardware bump and are most likely intended as a marketing ploy for 45nm technology.
Not the most exciting development this week [...]]]></description>
			<content:encoded><![CDATA[<p style="text-align: center"><img src="http://i137.photobucket.com/albums/q209/divxarsiv/sawcb/atom.jpg" /></p>
<p><span id="more-95"></span></p>
<p style="text-align: center">&nbsp;</p>
<p style="text-align: center">As the title and included image suggest, the Silverthorn and Diamondville processors have officially been renamed to Atom, with the Menlow platform now titled as Centrino Atom. Sure enough the new names sport absolutely no hardware bump and are most likely intended as a marketing ploy for 45nm technology.</p>
<p>Not the most exciting development this week but we like the name.<br />
_____________________________________________________________________<br />
Wie der Titel und enthaltenes Bild vorschlagen, die Silverthorn und Diamondville Prozessoren haben offiziell umbenannt in Atom-, mit dem Titel Menlow Plattform nun als Centrino Atom. Sicher genug, die neuen Namen der Sport absolut keine Hardware Bauch und sind am ehesten als ein Marketinggag für die 45nm-Technologie.</p>
<p>Nicht die aufregendste Entwicklung in dieser Woche, sondern wir wollen den Namen.</p>
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